The present invention relates to a microcomputer including a CPU (Central Processing Unit) and peripheral circuits. More particularly, the invention relates to a microcomputer having a function of selection between big-endian and little-endian.
In recent years, microcomputers are used for various purposes and provide diversified functions. Such microcomputer functions include a function of selecting the endian, i.e., representation of byte data as operation mode for the CPU.
Previously, the endianness for microcomputer data had been fixed to little-endian or big-endian. An external terminal had been used to select either endian on a microcomputer that is operable on both endian types. A user needed to preset the external terminal for the corresponding endian. Some CPUs changed the endian mode during operations. Related techniques are described in the inventions disclosed in Japanese Unexamined Patent Publication No. Hei 9(1997)-278918, Japanese Unexamined Patent Publication No. 2000-235503, and Japanese Unexamined Patent Publication No. Hei 9(1997)-097211.
Japanese Unexamined Patent Publication No. Hei 9(1997)-278918 aims at providing a mixed-endian computer system that supports tasks having different information types for one computer system. This computer system uses a mixed-endian circuit that improves functions of an existing two-endian computer system and enables the computer system to dynamically change the endian mode. The mixed-endian computer system can change the endian mode for each task as needed. The mixed-endian circuit automatically formats data in a format expected by the running task regardless of whether the task expects data of the big-endian format or the little-endian format. The mixed-endian circuit also formats a big-endian instruction or a little-endian instruction so as to be executable on the same computer system.
Japanese Unexamined Patent Publication No. 2000-235503 aims at concurrently running multiple operating systems using different endian types on the same computer. When a process in big-endian mode interrupts the operating system running in little-endian mode, a hardware-dependent portion of the system determines that the process is targeted for big-endian. The CPU endian is changed. Control is then passed to an interrupt handler for big-endian.
The information processor described in Japanese Unexamined Patent Publication No. Hei 9(1997)-097211 aims at meeting needs for an application to process big-endian data on a microcomputer originally capable of processing only little-endian data and prevent throughput for big-endian data processing from degrading in comparison with that for little-endian data processing. The information processor includes an address space discriminator for identifying an endian type and a byte aligner for changing the data endian based on a result from the address space discriminator. Firstly, the information processor allows a system to support data and devices for two types of endian. Secondly, the information processor can fast transfer data of any type of endian regardless of data lengths. Thirdly, the information processor easily identifies the endian. Endian is permanently allocated to each address space and therefore can be fast identified only based on the address information.
Patent Document 1: Japanese Unexamined Patent Publication No. Hei 9(1997)-278918
Patent Document 2: Japanese Unexamined Patent Publication No. 2000-235503
Patent Document 3: Japanese Unexamined Patent Publication No. Hei 9(1997)-097211